On a typical analog VLSI product, several circuits or sub-blocks in various locations on the integrated circuit's substrate need to be operatively connected to a single reference voltage. This requirement poses extreme challenges in layout routing since parasitic resistance in the conductors for distributing the reference potential and ground will cause the reference level to be different when supplied to disparate portions of the chip, due to I-R drops. This problem is particularly acute at high temperatures, where the metal resistance increases substantially. One way to reduce the resistance is to use wide conductors--i.e., route two wide metal paths across the chip to each sub-block that needs an accurate image of the reference. However, this presents further problems. First, wide paths consume valuable die area. Second, these long runs are susceptible to noise pick up and this susceptibility is increased with larger conductors. Additionally, this situation often is aggravated if other currents are allowed to flow on the reference ground line.
Further, it is quite useful, in some systems, to be able to make slight adjustments to the reference level presented to each sub-block, if the levels presented to all sub-blocks track some primary reference over time and temperature.
Accordingly, it is an object of the present invention to provide a reference voltage distribution system which accurately supplies the same reference voltage to a number of spaced-apart circuits or sub-blocks on an IC chip.
A further object of the invention is to provide such a reference voltage distribution system which reduces increased noise susceptibility.
Another object is to provide a reference voltage distribution system permitting use of less die area for wiring.
Still another object is to provide a reference voltage distribution system which permits individual blocks to be individually controlled.